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整体架构

流水线设计

graph LR ICache --> Decode --> ROB --> Integer & FP subgraph Fetch PC --> ICache end subgraph Dispatch ROB["Reorder Buffer"] end subgraph Issue Integer FP["Floating Point"] end subgraph Execute ALU FMA end Integer --> ALU FP --> FMA ALU & FMA --> ROB2 & CDB subgraph Writeback ROB2["Reorder Buffer"] CDB["Common Data Bus"] end ROB2 --> RegFile subgraph Commit RegFile["Register File"] end

各流水段的工作如下:

  1. Fetch:取指
  2. Decode:译码、进行 LMUL 的拆分
  3. Dispatch:在 Reorder Buffer 中分配指令并分发到 Reservation Station
  4. Issue:把 Reservation Station 中可以执行的指令发给 Execution Unit
  5. Execute:执行整数和浮点指令的计算
  6. Writeback:把整数和浮点指令计算的结果广播到 Common Data Bus 并写到 Reorder Buffer 里
  7. Commit:把 Reorder Buffer 里已完成指令按顺序写到寄存器堆

最后更新: May 4, 2020
作者: Harry Chen (2.33%), Jiajie Chen (97.67%)